Hello,
Currently we are starting the development of FX3 firmware.
In order to do code testing we would like to integrate an external C compiler to the IDE. The C compiler can be Visual Studio Compiler, Cygwin or Mingw.
We would like to know whether this is possible?
Hi everyone,
I'm trying to design a board using the FX3 but I got some questions about the VBUS/VBATT supplies. I don't know how I should use it.
I want my board to run on batteries so it is not always connected to a computer through the USB3 port (it can be connected if I need to send data to my board over USB or retrieve data over USB). I think I should use VBATT but I'm not so sure.
Should I connect VBUS to the USB VBUS line and VBATT to the output of a LDO ? (I'd like to use a LDO to get the 5V voltage).
What could the power consumption be if I use almost all the IOs of the FX3 in my design ? How many mA does the LDO need to produce for the VBATT pin in order to make the FX3 working properly ?
Thanks for the feedback.
I'm planning a project using an FX3 communicating with an FPGA on the GPIF II interface. I need to have the SPI port, so I can't use 32 bit mode. The project parameters recently changed, so I'm looking to get as much throughput as possible, so I'd like to use 24 bit mode for a slave fifo like interface. GPIF II designer and some documentation allow 24 bit interfaces, but the documentation on actually using a 24 bit interface is incomplete. Are there an firmware examples available for initializing a 24 bit interface?
Also, if I'm using a Bulk IN, how will the 24 bit data transfer to the PC?
Thanks,
James
Hi Guys,
Need your help regarding an UART issue I'm having in my custom board design.
I've burned the onboard I2C EEPROM with SlaveFifo example (from AN65974), with several
CyU3PDebugPrint() of my own. In this case I see my debug info printed on UART on a terminal.
However, when I'm burning the FPGA programming example (from AN84868), with
several debug messages of my own, I see no any UART debug info on terminal, even
after I have successfully programmed the onboard FPGA.
I probably missing something obvious here, but up to this point, can't really understand
what might be the reason to absence of debug messages?
Please let me know if you need more details to understand the root cause.
Thank you in advance.
The problem that we have observed is that when doing large transfers (bigger than the buffer space available on the fx3) if the pc has a high cpu load it has be seen to struggle to keep up with transfers. This causes the input to the dma buffers to catch up with the output and causes an error. This can be recovered from and the transfer can be started again, however the first transfer was still a failure. In time dependent applications this can cause issues as the usb timeout set on the pc has to wait to elapse before a new transfer is initiated.
The DMA watermark is well documented with regard to using hardware flags but due to the aforementioned problem we have a requirement where the DMA watermark needs to generate an interrupt/callback. We have sufficient time to take action to slow down the transfer into the gpif block if we are running out of buffer space but this has to be done in firmware. Our application is using an auto many to one dma channel from 2 pib sockets to one usb endpoint socket, with the gpif configured to have a 16bit data bus with data clocked in from an external source. The transfer is of known finite size, though that size can vary from transfer to transfer, but it always begins with data placed into the same socket (0). We can poll the DMA transfer status to get the number of produced buffers and the number of consumed buffers, however this is processor intensive and we have unknown latency in the time taken to poll the dma transfer and calculate how full the buffers are.This means we have to set the threshold for taking action to slow down the transfer into the gpif block much lower than the total buffer space (each thread has 4 x 16384 byte buffers).
The technical reference manual refers to DSCR_IS_LOW in the SCK_INT register as an interrupt when the socket descriptor counter is below the socket descriptor watermark. This looks like the best function for our application but we can not find any reference documentation on the descriptor counter or its associated watermark and interrupts. Is any one able to help on this or some other means of generating interrupts on DMA watermarks. Our possible fall back position is to link the watermark flags to GPIO inputs and interrupt on change of port but this requires hardware changes and we are already running low on I/O.
I design a USB 3.0 IO card with a USB 3.0 standard TYPE-A receptacle and CYUSB3014BZXI. when I route my PCB, I find the differential pairs cross each other.In AN70707,it says "The polarity can be swapped on the USB 3.0 differential pairs."，so I want build the traces(STDA_SSTX-,SSTXP),(STDA_SSTX+,SSTXM),(STDA_SSRX-,SSRXM),(STDA_SSRX+,SSRXP).it means that I swap the SSTX, don't swap the SSRX.but in DVK, cypress swaps the SSRX, doesn't swap the SSTX.
so please tell me, my design can work fine?
The FX3 SDK ticks appear to be 1.024ms, not 1ms. For example, a test thread thus:
int state =0;
for(;;)
{
CyU3PGpioSimpleSetValue(GPIO_STATUS_LED, state);
state ^=1;
CyU3PThreadSleep(1000);
}
This toggles the output at 512millihertz. Changing the sleep to 1024 toggles at the expected 500millihertz.
How can we correct the FX3 setup to tick properly at the documented 1ms?
I am currently working on my bachelor thesis and i am wondering if you have any examples or tips how you can run a video stream along side a UART communication link. Our goal is to have a video stream coming into the FX3 then out to the host pc and the control channel goes both ways.
PC -> FX3 -> camera/other device
and
camera/other device -> FX3 -> PC
What i understand is that we need to use some sort of composite device to get drivers for both the comport and the video device but im not really sure how? We found fireware with drivers for the two function but they only work by them self.
I'm thankful for all help!
Regards Joel
Hi,
I want to setup a multi channel DMA.One producer to multi consumers with manual mode.
How do I choice which consumer that I want to commit in my callback function ?
Producer : CY_U3P_PIB_SOCKET_0
Consumers : CY_U3P_UIB_SOCKET_CONS_2 CY_U3P_UIB_SOCKET_CONS_9
Thank you!!
Hi,
I'm currently trying to use the FX3 SUPERSPEED EXPLORER KIT before designing a custom board with the FX3 component.
I'm using Windows and I'm trying to compile the UsbUart project but I can't compile it. I actually get the following error in the Cypress EZ USB Suite :
cs-make: *** [cyfx_gcc_startup.o] Error 1
I installed both EZ-USB FX3 SDK 1.3.3 and Superspeed Explorer Kit Rev (both with the complete setting chosen) but it doesn't work.
Could you please help to solve my problem ?
I got another question : the UsbUart example is described as an USB to UART bridge. Does it mean that I can directly plug the wires of a UART interface from a microcontroller and I would be able to use HyperTerminal to communicate with it without any extra setup ? Does it work "out of the box" ?
Thanks in advance for the feedback.
I have a problem,i use the fx3 chip,and i use the spi with the DMA mode ,i enable both transfer and receive,i want to know can i transfer and receive only one word every time?
status = CyU3PDmaChannelSetupRecvBuffer (&glSpiRxHandle, &buf_p);
CyU3PDmaChannelSetupSendBuffer (&glSpiTxHandle,&s_buf);
CyU3PSpiSetBlockXfer (1, 1);
status = CyU3PDmaChannelWaitForCompletion(&glSpiTxHandle,CY_FX_USB_SPI_TIMEOUT);
status = CyU3PDmaChannelWaitForCompletion(&glSpiTxHandle,CY_FX_USB_SPI_TIMEOUT);
CyU3PSpiDisableBlockXfer (CyTrue, CyTrue);
I AM DEVELOPING ON THE CX3-Reference-Design-Kit.
WANT TO USE THE CX3065'S OUTPUT CLK AS IMAGE SENSOR'S MAIN CLOCK,
IS THERE ANY CODE SAMPLE FOR THIS?
Hi all,
I am testing CYUSB2014/UVC. (Get/Set Sensor's gain value: using UVCHandleProcessingUnitRqts() )
On Windows OS, getting/setting operation plays well.
But Linux OS, it does not play.
I use the same firmware file(*.img).
I want to know why that does not on Linux OS.
Please response about that.
Regards, thank you.
Kim
I create a fpga design to write data to fx3 based on AN65974 (Slave fifo).
IN my Firmware, I use the function as follows- CyU3PGpifSocketConfigure(0, CY_FX_PRODUCER_PPORT_SOCKET, 6, CyFalse, 1);meawhile flagA have been configured as DMA_ready , flagB be configured as DMA_watermark.
I am able to transfer for a very short amount of time before Flag B remains Low = Buffer Full. oscilloscope both flags go low when the buffer is full but only flag A goes back up to show that the buffer is Not Full. Why does the signal not go back up?
I also used this implementation- CyU3PGpifSocketConfigure(0, CY_FX_PRODUCER_PPORT_SOCKET, 0, CyFalse, 0);When changing the watermark value from 6 to 0 I had no issues and flag B matched up with flag A .
Thanks!
I use the FX3 contact to a spi chip,i use the spi with the DMA mode,the external chip need that the MOSI PIN of FX3 must be high level,but when i init the spi interface of the FX3,this pin is low level in the idel state.then i use the spi with the DMA mode to transfer and receive at the same time ,and when read data from the external chip ,i transfer oxff.but when i set to transfer and receive only one word,the CyU3PDmaChannelWaitForCompletion return is eeror(CY_U3P_ERROR_NOT_STARTED) ,
status = CyU3PDmaChannelSetupRecvBuffer (&glSpiRxHandle, &buf_p);
CyU3PDmaChannelSetupSendBuffer (&glSpiTxHandle,&s_buf);
CyU3PSpiSetBlockXfer (1, 1);
status = CyU3PDmaChannelWaitForCompletion (&glSpiRxHandle,
CY_FX_USB_SPI_TIMEOUT);
if (status == CY_U3P_ERROR_NOT_STARTED)
{
//CyU3PGpioSetValue(34,CyFalse);
}
status = CyU3PDmaChannelWaitForCompletion(&glSpiTxHandle,
CY_FX_USB_SPI_TIMEOUT);
if (status != CY_U3P_SUCCESS)
{
CyU3PGpioSetValue(37,CyFalse);
}
CyU3PSpiDisableBlockXfer (CyTrue, CyTrue);
can you tell me what is the problem?
thanks very much.
Hello,
My situation: custom FX3 design with boot library, internal core power (not from USB).
I have configured 2 USB bulk endpoints and 2 PPorts (to an FPGA), everything over auto DMA channels. Starting point was the "gpiftousb" example. It is basically in an auto forwarding only mode: EP2 : USB -> FPGA; EP86: FPGA -> USB. Everything works as expected on first enumeration.
I have problems AFTER USB3 cable is disconnected/reconnected. Just to make it clear: all problems below happen only with SS, everything works correctly on HS!
1. From host POV, everything is good; re-enumeration, device is visible in device manager.
2. There is no (disconnect) event visible in UsbEventCallback when removing the cable, why? I don't really need it, but it might be a hint. Additionally, when disconnected the function "CyFx3BootUsbGetSpeed" (polled in the main loop) still returns CY_FX3_BOOT_SUPER_SPEED !?
3. After re-connect, no data sent from host (over bulk EP) reaches the DMA!? I enabled a interrupt callback on DMA transfer just to print a message, and it doesn't trigger it.
I have tried everything I could think of:
- a simple vendor command re-initializes everything (DMA, GPIF, etc)
- I bought the SuperSpeed Explorer Kit and modified the power circuit to match my situation; the same problem (I just look for the DMA callback message).
- (re)connecting to USB2 cable works immediately, USB3 still shows the problem. This hints towards the USB3 handling.
- I found that the problem occurs only after first bulk transfer from host. Before doing any transfer, I can disconnect and reconnect several times; the first transfers will work correctly. This hints towards DMA buffer issues, but I did not find any DMA reset other than disabling / enabling it again...
The whole issue seems to be some kind of initialization issue in the boot library.
I am thankfull for any other hints / ideas.
Regards,
Gabriel
Hello,
I got two questions about the FX3 GPIOs.
What should I do with unused GPIO pins in my design ? Should I leave it floating ?
My second question is about the 22Ohms resistor. In the datasheet it is said that a 22Ohm should be connected to any pin driven by the GPIFII interface. I thought that any other pin should not be connected to that resistor but I saw in the Superspeed explorer kit schematics that a 22Ohm resistor is also connected to the UART and SPI pins. What should I do ?
Hi all,
I am using FX3 UVC.
Question: Is FX3 UVC driver compatible with OpenCV on Linux OS?
In application note(AN75779), contents about V4L2 exist. But I want to know whether OpenCV does or not.
Various Host applications allow you to display and capture video from a UVC device. The VLC Media Player is a
popular choice. Another widely used Windows application is AMCap. We recommend AMCap Version 8.0 because it
has demonstrated stability when streaming, whereas later versions of AMCap can slow down stream rendering. Two
additional Windows apps are VirtualDub (an open-source application) and Debut Video Capture software. Linux
systems can use the V4L2 driver and VLC Media Player to stream video. The VLC Media Player is available on the
web. Mac platforms can use FaceTime, iChat, Photo Booth, and Debut Video Capture software to create an interface
with the UVC device to stream video. (Page 57 in AN75779)
Please response about that.
Regards, thank you.
Kim
Hi.,i use the j-link to debug the FX3,but it can not enter the CyU3PKernelEntry ();How can i debug enter the thread_enter function?
Hi all,
I'm using CX3 UVC and have some questions as below.
Q : 1. Is it possible to connect the GPIF socket0,socket1 with SPI consumer's socket? If possible, would you please let me know how to code the multichannel DMA?
2. How to do programming and receive the signal of CY_U3P_DMA_CB_PROD_EVENT only. But with no need of the signal data of cusumer's event(CY_U3P_DMA_CB_CONS_EVENT) in cycx3_uvc.c?
Thanking in advance for your kindness and prompt response,
Sincerely yours,
Martin